Lectures

NB! This is the preliminary schedule. That is, names of the topics and their order may change.
Distribution of the content between lectures may change, i.e., the boundaries between lectures are not fixed.

Lectures are scheduled for Thursdays from 12:00 to 13:30 (at ICT-507).

Week Date   Topic
  .pdf  
1
4.09
  Introduction and modeling principles.
1-4
4.09, 11.09,
18.09, 25.09
  Hardware description language VHDL.
5
2.10
  VHDL and RTL synthesis.
6
9.10
  Climbing the VLSI Power Wall for nm Era (R. V. Joshi)
  Please note the location - U03-103!
7
16.10
  Testbenches, co-simulation and co-modeling of digital systems.
8, 9
23.10, 30.10
  Hardware description language SystemVerilog.
10
6.11
  PicoCPU architectures - discussions.
 
11, 12
13.11, 20.11
  Synthesis of digital systems at different abstraction levels.
13
27.11
  Hardware description language SystemC.
14
4.12
  Code transformations at system and algorithmic levels.
15
11.12
  Modeling of analog and mixed signal systems - SPICE, VHDL-AMS. System level description languages.
16
18.12
  Back-up time...
 

'*)' - lecture material from the previous year.
- Portable Document Format. Install to read and print the files. 

Last modified 2014.12.01.