Lectures

NB! This is the preliminary schedule. That is, names of the topics and their order may change.
Distribution of the content between lectures may change, i.e., the boundaries between lectures are not fixed.

Lectures are scheduled for Fridays from 10:00 to 11:30 (at ICT-A1).

Week	Date	Topic	.pdf
1	31.01	Introduction and modeling principles.
1-3	31.01, 7.02, 14.02	High-level synthesis.
4	21.02	Ericsson Tallinn by Kamal Foudil-Bey
5	28.02	Hardware description language SystemC.
6, 7	6.03, 13.03	Co-modeling and co-simulation of digital systems, testbenches.
8, 9	20.03, 27.03	Hardware description language SystemVerilog.
10	3.04	Hardware description languages and RTL synthesis.   GCD example expanded.
11	10.04	National holiday
12	17.04	Synthesis of digital systems at different abstraction levels.
13	24.04	Modeling of analog and mixed signal systems - SPICE, VHDL-AMS.
14	1.05	National holiday
15	8.05	Code transformations at system and algorithmic levels.
16	15.05	Backup time...

Recorded lectures and exercise from spring 2019. [Additional codeces mabye needed...]

Hand-outs from lectures by prof. Paul Kolin in spring 2019.

Date	Topic	.pdf
11.03.2019	Models of Computation: State Machine Models, Process Networks, DataFlow Networks.
18.03.2019	HLS for FPGAs: Exploiting Pipeline Parallelism.

Recorded lectures from spring 2018. [Additional codeces mabye needed...]

'*)' - lecture material from the previous year.
- Portable Document Format. Install to read and print the files.

Extra materials:

• VHDL handouts
• VHDL encoding styles and synthesis results (GCD example)
• Linear Programming Examples

Last modified 2020.05.07.