module tb_calculations_fixed # (
  parameter DATA_LEN = 16
);
  // Declare variables that need to be connected to the design instance
  // These variables are assigned some values that in turn gets transferred to
  // the design as inputs because they are connected with the ports in the design
  logic [DATA_LEN-1:0] a_tb, b_tb;
  logic [DATA_LEN-1:0] sum_tb, sub_tb, mult_tb, div_tb;
  real a_fixed_tb, b_fixed_tb;
  real sum_fixed_tb, sub_fixed_tb, mult_fixed_tb, div_fixed_tb;

  // Instantiate the design module and connect the variables declared above
  // with the ports in the design
  adder # (
    .DATA_LEN (DATA_LEN)
  ) my_adder (
    .a (a_tb),
    .b (b_tb),
    .y (sum_tb));
  sub # (
    .DATA_LEN (DATA_LEN)
  ) my_sub (
    .a (a_tb),
    .b (b_tb),
    .y (sub_tb));
  mult_fix # (
    .DATA_LEN (DATA_LEN)
  ) my_mult (
    .a (a_tb),
    .b (b_tb),
    .y (mult_tb));
  div_fix # (
    .DATA_LEN (DATA_LEN)
  ) my_div (
    .a (a_tb),
    .b (b_tb),
    .y (div_tb));

    initial begin
    a_tb = 16'b000000_0000000000; // 0.0
    b_tb = 16'b000000_0000000000; // 0.0
    #10                           // 0.0

    a_tb = 16'b000000_1000000000; // 0.5
    b_tb = 16'b000001_0000000000; // 1.0
    #10                           // 1.5

    a_tb = 16'b000000_1100000000; // 0.75
    b_tb = 16'b000000_0100000000; // 0.25
    #10                           // 1.0

    a_tb = 16'b000010_1011001101; // 2.7
    b_tb = 16'b000001_1110011010; // 1.9
    #10                           // 4.6
    $stop;
  end
  assign    a_fixed_tb =    a_tb/1024.0;
  assign    b_fixed_tb =    b_tb/1024.0;
  assign  sum_fixed_tb =  sum_tb/1024.0;
  assign  sub_fixed_tb = signed'(sub_tb)/1024.0;
  assign mult_fixed_tb = mult_tb/1024.0;
  assign  div_fixed_tb =  div_tb/1024.0;
endmodule